Enable-IT 895 Series Bedienungsanleitung PDF herunterladen (Seite 12)

AN-895

Rev. 0 | Page 12 of 16

Slave Transmit

The slave generates an interrupt on each request for data to be

transmitted, the first occurring after the ACK of the address,

that is, while Byte 0 of the FIFO is sent. Data needs to be

preloaded into the slave Tx FIFO, otherwise the first read

request from the master results in a NACK being generated. If

the FIFO is preloaded with two sets of data, one interrupt

occurs after the ACK of the address and then after the ACK of

each byte sent. If the FIFO is preloaded with one set of data

only, two interrupts occur after the ACK of the address, the

FIFO emptying after sending the first data.

Once a byte has been transmitted, an interrupt is generated as

long as the master continues to request data. Bit 2 of I2C0SSTA

is set each time a byte is transmitted to the master.

An example of a slave responding to a request for data from a

master is shown in

Figure 21.

//ENABLE I2C on GPIO P1.0 AND P1.1

GP1CON = 0x22;

//RETURN FROM ISR

VECTOR TO

INTERRUPT SERVICE ROUTINE

//SET UP I2C SLAVE MODE

I2C0CFG = 0x1;

//CHECK FOR T

INTERRUPT

if (I2C0SSTA AND 0x04)

//LOAD NEXT BYTE INTO T

FIFO

I2C0STX = DATA;

//SPECIFY INTERRUPT SERVICE ROUTINE

AND ENABLE SLAVE I2C INTERRUPT

IRQ = MY_IRQ_FUNCTION;

IRQEN = 0x200;

//PLACE FIRST TWO BYTES IN T

FIFO

I2C0STX = 0x11;

I2C0STX = 0x22;

//WAIT FOR MASTER

Figure 20. Slave Transmit Flowchart

READ

DEVICE

ADDRESS

SDA LINE

ACK

NO ACK

ACK

STOP

R/W

DATA (n + 2) DATA (n + x)DATA (n + 1)DATA (n)

TRANSMIT

INTERRUPT

TRANSMIT

INTERRUPT

TRANSMIT

INTERRUPT

TRANSMIT

INTERRUPT

Figure 21. Example of a Slave Transmit

1 2 ... 7 8 9 10 11 12 13 14 15 16

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