Enable-IT 895 Series Bedienungsanleitung Seite 1

AN-895APPLICATION NOTEOne Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Te l: 781.329.4700 • Fax: 781.461.3113 • www.analog.co

AN-895 Rev. 0 | Page 10 of 16 Slave Receive As the data is received by an I2C slave, an interrupt is generated as each byte of data is placed in th

AN-895 Rev. 0 | Page 11 of 16 Master Receive In master mode, to read data from a slave, a similar approach is used. First, the number of bytes to b

AN-895 Rev. 0 | Page 12 of 16 Slave Transmit The slave generates an interrupt on each request for data to be transmitted, the first occurring after

AN-895 Rev. 0 | Page 13 of 16 I2C REGISTER DEFINITIONS The I2C peripheral interface consists of 15 registers in total: • Four registers that inclu

AN-895 Rev. 0 | Page 14 of 16 I2CxCFG: I2C Configuration Register Table 3. I2CxCFG MMR Bit Descriptions Bit No. Description 31 to 15 Reserved. Th

AN-895 Rev. 0 | Page 15 of 16 I2CxSSTA: Slave Status Register Note: reading the status register modifies its contents. Only read it once and save i

AN-895 Rev. 0 | Page 16 of 16 IMPLEMENTATION OF THE SERIAL EEPROM PROTOCOL This section covers the implementation of the five commands supported by

AN-895 Rev. 0 | Page 2 of 16 TABLE OF CONTENTS Introduction ...

AN-895 Rev. 0 | Page 3 of 16 I2C INTERFACE OVERVIEW I2C is a 2-wire serial communication system developed by Philips that allows multiple masters a

AN-895 Rev. 0 | Page 4 of 16 Data Transfer In the I2C interrupt service routine (ISR), or in a polled implementation, the slave decides whether or

AN-895 Rev. 0 | Page 5 of 16 Repeated Start Condition A repeated start condition occurs when a second start condition is sent to a slave without a

AN-895 Rev. 0 | Page 6 of 16 Clock Stretching In an I2C communication, the master device determines the clock speed. Unlike RS232, the I2C bus prov

AN-895 Rev. 0 | Page 7 of 16 I2C IMPLEMENTATION ON THE ADUC702x SERIES MICROCONVERTER The ADuC702x series of parts contain two full hardware master

AN-895 Rev. 0 | Page 8 of 16 Transmit FIFO To transmit data, the I2C0STX/I2C0MTX registers must be loaded. Writing a byte to the Tx register is equ

AN-895 Rev. 0 | Page 9 of 16 Master Transmit In order to transmit a byte, the data must first be loaded into the transmit FIFO. The address of the