Enable-IT 8424 Bedienungsanleitung Seite 5

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Hytec Electronics Ltd 8424TR/UTM/G/5/2.0
Page 5
1. INTRODUCTION
The Hytec IP-ADC-8424 is an Industry Pack that provides 4 channels of simultaneously
sampled analogue digitisation with the following characteristics:-
4 independent channels (one ADC per input).
True full differential inputs.
Up to 1MHz sampling rate.
Input impedance - 10Mohms differential.
Resolution - 16 bits no missing codes.
Accuracy - 14 bits.
On board RAM Memory 1M x 16 bits (256K conversions per channel).
Programmable full-scale resolution all inputs +/-10V or +/-5V.
On-board calibration by FPGA firmware using stored offset and gain.
Gain drift - 4ppm per deg C (typ).
Offset drift - +/-10uV/degC (typ).
+/-10V offset error - +/-2LSBs with firmware calibration (+/- 2mV without calibration).
+/-5V offset error - +/-4LSBs with firmware calibration (+/- 2mV without calibration).
+/-10V gain error - +/-2LSBs with firmware calibration (+/- 5mV without calibration).
+/-5V gain error - +/-4LSBs with firmware calibration (+/- 4mV without calibration).
ADC voltage reference drift - 2.0ppm/
o
C (max).
CMRR: - 100dB at +/-5V wrt plant CMV (92db typical at 100KHz).
Aperture Delay - 15 ns typ.
Aperture Delay Matching - 70 ps typ.
Aperture Jitter - 50 ps typ.
Over voltage - +/-25V on or off.
On-board sample clock programmable (1MHz, 500KHz, 200KHz, 100KHz, 50KHz,
20KHz,10KHz, 5KHz, 2KHz, 1KHz, 500Hz, 200Hz,100Hz, 50Hz, 20Hz,10Hz,
5Hz, 2Hz and 1Hz).
Ext sample clock isolated input.
Ext trigger isolated input.
System to plant isolation to 100V when externally powered by DC/DC converter option.
Board type, Serial number, PCB issue and firmware issue held in ID PROM.
8/32MHz IP system clock operation.
Field upgradeable firmware (requires Xilinx/compatible device to program built in FPGA flash
memory via the FPGA JTAG port).
EPICS and ASYN driver support.
PCB temperature measurement via onboard chip.
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